In a smart card, it has become the case in the meantime that the communication, that is to say the transmission and reception of data, is effected contactlessly. It has also become the case in the meantime that the transmitter and the receiver of the smart card are supplied with energy contactlessly. The energy for supplying the transmitter and the receiver of the smart card is drawn from the electric field surrounding the smart card.
Since the trend is toward higher data transfer rates of up to 1 Mbit/s or higher and the current consumption in the chip rises at the same time, the requirements in the context of supplying the chip with energy also rise.
The data transfer is effected with the aid of high-frequency amplitude modulation. Data are transferred from the card reader to the chip, the chip then serving as a receiver, and data are also transferred from the chip to the card reader, the chip then serving as a transmitter. The card reader is quite often also referred to as a reader. At a data rate of 1 Mbit/s or higher in conjunction with a large current consumption of the chip, it becomes difficult, during the load modulation, that is to say during a data transfer from the chip to the card reader, to achieve a sufficiently large modulation swing with present-day systems. When the data transmitted by the card reader are received, it likewise becomes difficult to achieve a sufficiently large signal swing for the modulated signal to be clearly delineated from the noise and the disturbances of the coupling link or of the chip. In order to increase the identification accuracy, it is therefore advantageous to achieve a good signal-to-noise ratio.
An energy store for supplying energy to the chip is generally provided on the chip. If the capacitance of the energy store in the supply path is chosen to be very small, it is necessary to introduce a new concept for supplying energy to the chip during the field gaps as occur in the case of Type A mode of operation.
The term Type A transfer method is used hereinafter in the case of a modulation index of 100%.
The conventional method consists in concentrating energy from the field in a charge store, for example in a capacitance. This results in a DC voltage UDC, which is modulated onto a sawtooth-weightform voltage because the charging of the energy store and the discharging alternate with respect to time. If a Type A gap occurs, which means that e.g. for approximately 3 μs no clock pulse and no field are present, an energy source has to provide the load, that is to say the chip, with the energy required in this time.
The functional principle of the energy supply as known from the prior art is explained with reference to the block diagram shown in FIG. 1. The voltage UF generated from the field F charges a backup capacitance CS via a rectifier 1 during the field peaks. The charging time is generally very short in this case. Outside this short charging time, the backup capacitance CS ensures that energy is supplied to the chip. During the time duration in which the backup capacitance CS serves as an energy supply, it is discharged via a load resistance RL which symbolizes the load. If the load resistance RL is small, a large amount of energy and thus a high quantity of charge is drawn from the backup capacitance CS and the DC voltage UDC across the load resistance RL decreases rapidly in accordance with an exponential function. The smaller the backup capacitance CS, the faster the voltage UDC across the load resistance RL falls. The backup capacitance CS must be designed to be large enough that the voltage UDC does not fall below a minimum voltage in the time to be bridged. If a large backup capacitance CS is provided for this reason, although the voltage UDC does not fall below the minimum voltage, by the same token it becomes all the more difficult to charge the backup capacitance CS to the desired voltage UDC desired. The difficulty results from the fact that it is not possible to draw an arbitrary amount of energy from the field F. The quantity of energy which can be drawn from the field F is dependent, inter alia, on the transmission power of the card reader, the quality of the antenna of the card reader, the distance between the antenna of the card reader and the antenna of the chip and the quality of the antenna of the chip. In order that the energy balance is equalized, the field F must subsequently supply at least as much energy as the energy that is consumed by the load resistance RL.
A further method that is often used consists in adding a series regulator and a capacitance CH to the circuit in accordance with FIG. 1. The resultant device is shown in FIG. 2. With the aid of the rectifier 1, the voltage UF engendered by the field F is converted into a pulsating DC voltage UDC and smoothed with the aid of the capacitance CH. The series regulator 2, which does not have to have a good PSRR value in this case, generates a voltage UDC which is reduced relative to the voltage UF. Without a series regulator, the regulation of the voltage UDC must be undertaken by a parallel regulator.
Overall, care must be taken to ensure that the field F is not burdened by large energy stores, as constituted by the capacitance CH and the capacitance CS, via a low-impedance connection, formed for example by the rectifier 1. If large energy stores are connected to the field F in a low-impedance manner, data transfers with high data rates become impossible. Moreover, the dynamic range is reduced in this case even at low data rates.
The abovementioned problems arise with this device as well.
Both of the devices shown in FIGS. 1 and 2 have the disadvantage that, since the capacitance has to be chosen to be large, the useful signal swing and the dynamic range soon become too small during the data communication. The card reader is no longer able to distinguish the load modulation of the chip from disturbances from the field, which leads to a malfunction. Equally, on account of the low useful signal, the chip can no longer decode the data transmitted by the card reader. The dynamic range in the signal becomes too small. The useful signal is submerged in the noise and the data communication collapses.
In order to explain this relationship, FIG. 3 shows the profile of the voltage UF at the input of the rectifier 1 and the profile of the voltage UDC across the load resistance RL. For this purpose, the time t is plotted on the x axis and the amplitude of the voltage U is plotted on the y axis. The profile of the voltage UF at the input of the rectifier 1 is identified by the reference symbol 31. The broken line provided with the reference symbol 32 identifies the profile of the voltage UDC. The voltage UF falls at the instant t1 and does not rise again until the instant t2, which has the effect that the voltage UDC decreases continuously in the range between the two instants t1 and t2 due to the load RL and likewise increases again from the instant t2 up to the instant t3, namely as long as the voltage UF rises. It must be emphasized, however, that the voltage UDC no longer reaches its original value at the instant t3. The time periods t2-t3 and t4-t5 do not suffice to bring the voltage UDC in each case to its original value again. Rather, the voltage average of the voltage UDC decreases continuously. This ultimately has the effect that the card reader is no longer able to distinguish the load modulation of the chip from disturbances from the field and a malfunction thus occurs. Equally, on account of the low useful signal, the chip can no longer decode the data transmitted by the card reader.